发明申请
US20090141570A1 Controlling Global Bit Line Pre-Charge Time for High Speed eDRAM 有权
控制高速eDRAM的全局位线预充电时间

Controlling Global Bit Line Pre-Charge Time for High Speed eDRAM
摘要:
A method of operating a memory includes performing a write operation and a read operation on a memory cell. The write operation includes starting a first global bit line (GBL) pre-charge on a GBL; and after the first GBL pre-charge is started, enabling a word line to write into the memory cell, wherein the steps of starting the first GBL pre-charge and enabling the word line have a first time interval. The read operation includes starting a second GBL pre-charge on the GBL; and after the second GBL pre-charge is started, enabling the word line to read from the memory cell, wherein the steps of starting the second GBL pre-charge and enabling the word line have a second time interval. The first time interval is greater than the second time interval.
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