A processor-implemented method for making a semiconductor device having a test logic block and a functional logic block is provided. The method includes retrieving hardware description for at least one test logic block and mapping the hardware description for the at least one test logic block to logic gates to generate at least one synthesized test logic block. The method further comprises retrieving hardware description for at least one functional logic block and mapping the hardware description for the at least one functional logic block to logic gates to generate at least one synthesized functional logic block. The method further includes merging the at least one synthesized test logic block with the at least one synthesized functional logic block when the at least one functional logic block meets at least one criterion for selection as a candidate for merger with the at least one test logic block.