A thin film transistor array substrate includes an insulating substrate, a plurality of scan lines, an insulating layer, a plurality of data lines, and a plurality of pixels arranged in an array of rows and columns. The pixels in each row are aligned in a row direction, the pixels in each column are aligned in a column direction, and the pixels are separated from each other by the scan lines and the data lines. Each pixel includes a thin film transistor and a pixel electrode. The pixel electrode has at least one opening that extends from the periphery to the inside of the pixel electrode and at least one extension part that extends in the row direction into an opening of a neighboring pixel electrode in the same row. Each of the scan lines alternately controls one of the pixel electrodes in a first row and one of the pixel electrodes in a second row immediately adjacent to the first row.