A synchronization circuit includes a first flip-flop circuit to hold an input signal which is asynchronous to a clock signal by the clock signal, and output an output signal, a second flip-flop circuit to hold the input signal by a signal of an opposite phase to the clock signal and output a signal, a comparing unit to compare the input signal and the output signal of the first flip-flop circuit and output a signal with a high or low level depending on whether the input signal and the output signal of the first flip-flop circuit have the same level, a selection unit to select one of the output signal of the first flip-flop circuit and the output signal of the second flip-flop circuit depending on the level of the signal outputted by the comparing unit, and a third flip-flop circuit to output the output signal selected by the selection unit.