发明申请
- 专利标题: POWER-ON CLEAR CIRCUIT
- 专利标题(中): 上电清零电路
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申请号: US12330800申请日: 2008-12-09
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公开(公告)号: US20090160506A1公开(公告)日: 2009-06-25
- 发明人: Kotaro Watanabe
- 申请人: Kotaro Watanabe
- 优先权: JPJP2007-327296 20071219
- 主分类号: H03L7/00
- IPC分类号: H03L7/00
摘要:
Provided is a power-on clear circuit which normally operates. Even when a rising speed of a power supply voltage is slow, or when the power supply voltage rises from a voltage other than a ground voltage, a voltage of a node (C) is unlikely to become unstable owing to provision of a pull-down element (22) at the node (C). Thus, the power-on clear circuit normally operates, whereby a circuit connected to an output terminal of the power-on clear circuit may be normally initialized.
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