Invention Application
US20090166892A1 CIRCUIT BOARD FOR SEMICONDUCTOR PACKAGE HAVING A REDUCED THICKNESS, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE HAVING THE SAME 审中-公开
具有减小厚度的半导体封装的电路板,用于制造它们的方法和具有该厚度的半导体封装

  • Patent Title: CIRCUIT BOARD FOR SEMICONDUCTOR PACKAGE HAVING A REDUCED THICKNESS, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE HAVING THE SAME
  • Patent Title (中): 具有减小厚度的半导体封装的电路板,用于制造它们的方法和具有该厚度的半导体封装
  • Application No.: US12260130
    Application Date: 2008-10-29
  • Publication No.: US20090166892A1
    Publication Date: 2009-07-02
  • Inventor: Ki Yong LEE
  • Applicant: Ki Yong LEE
  • Priority: KR10-2008-0000299 20080102
  • Main IPC: H01L23/485
  • IPC: H01L23/485 H05K1/09 H05K3/02
CIRCUIT BOARD FOR SEMICONDUCTOR PACKAGE HAVING A REDUCED THICKNESS, METHOD FOR MANUFACTURING THE SAME, AND SEMICONDUCTOR PACKAGE HAVING THE SAME
Abstract:
A circuit board includes an insulation body having a first surface and a second surface facing away from the first surface. The circuit board comprises a hardened insulation material. Circuit patterns having first conductive surfaces, second conductive surfaces facing away from the first conductive surfaces, and side surfaces connecting the first and second conductive surfaces embedded in the insulation body. That is, the second conductive surfaces and the side surfaces are embedded in the insulation body through the first surface of the insulation body, and the first conductive surfaces are exposed out of the insulation body. Recognition patterns are formed on the second surface of the insulation body.
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