发明申请
US20090212343A1 NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
有权
非易失性双向晶体管可编程逻辑单元和阵列布局
- 专利标题： NON-VOLATILE TWO-TRANSISTOR PROGRAMMABLE LOGIC CELL AND ARRAY LAYOUT
- 专利标题（中）： 非易失性双向晶体管可编程逻辑单元和阵列布局
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申请号： US12417189申请日： 2009-04-02
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公开(公告)号： US20090212343A1公开(公告)日： 2009-08-27
- 发明人: Fethi Dhaoui , John McCollum , Vidyadhara Bellippady , William C. Plants , Zhigang Wang
- 申请人： Fethi Dhaoui , John McCollum , Vidyadhara Bellippady , William C. Plants , Zhigang Wang
- 申请人地址： US CA Mountain View
- 专利权人： ACTEL CORPORATION
- 当前专利权人： ACTEL CORPORATION
- 当前专利权人地址： US CA Mountain View
- 主分类号： H01L29/788
- IPC分类号： H01L29/788
摘要：
A two-transistor non-volatile memory cell is formed in a semiconductor body. A memory-transistor well is disposed within the semiconductor body. A switch-transistor well is disposed within the semiconductor body and is electrically isolated from the memory transistor well. A memory transistor including spaced-apart source and drain regions is formed within the memory-transistor well. A switch transistor including spaced-apart source and drain regions is formed within the switch-transistor well region. A floating gate is insulated from and self aligned with the source and drain regions of the memory transistor and switch transistor. A control gate is disposed above and aligned to the floating gate and with the source and drain regions of the memory transistor and the switch transistor.
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