Invention Application
US20090239366A1 Method Of Forming A Transistor Gate Of A Recessed Access Device, Method Of Forming A Recessed Transistor Gate And A Non-Recessed Transistor Gate, And Method Of Fabricating An Integrated Circuit
有权
形成嵌入式接入装置的晶体管栅极的方法，形成嵌入式晶体管栅极和非嵌入晶体管栅极的方法以及制造集成电路的方法
- Patent Title: Method Of Forming A Transistor Gate Of A Recessed Access Device, Method Of Forming A Recessed Transistor Gate And A Non-Recessed Transistor Gate, And Method Of Fabricating An Integrated Circuit
- Patent Title (中): 形成嵌入式接入装置的晶体管栅极的方法，形成嵌入式晶体管栅极和非嵌入晶体管栅极的方法以及制造集成电路的方法
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Application No.: US12476364Application Date: 2009-06-02
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Publication No.: US20090239366A1Publication Date: 2009-09-24
- Inventor: Hasan Nejad , Thomas A. Figura , Gordon A. Haller , Ravi Iyer , John Mark Meldrim , Justin Harnish
- Applicant: Hasan Nejad , Thomas A. Figura , Gordon A. Haller , Ravi Iyer , John Mark Meldrim , Justin Harnish
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L21/3205
Abstract:
Methods and structures are provided for full silicidation of recessed silicon. Silicon is provided within a trench. A mixture of metals is provided over the silicon in which one of the metals diffuses more readily in silicon than silicon does in the metal, and another of the metals diffuses less readily in silicon than silicon does in the metal. An exemplary mixture includes 80% nickel and 20% cobalt. The silicon within the trench is allowed to fully silicide without void formation, despite a relatively high aspect ratio for the trench. Among other devices, recessed access devices (RADs) can be formed by the method for memory arrays.
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