发明申请
US20090261474A1 WAFER LEVEL PACKAGE HAVING A STRESS RELIEF SPACER AND MANUFACTURING METHOD THEREOF 有权
具有应力消除间隔件的水平包装及其制造方法

WAFER LEVEL PACKAGE HAVING A STRESS RELIEF SPACER AND MANUFACTURING METHOD THEREOF
摘要:
In a semiconductor device package having a stress relief spacer, and a manufacturing method thereof, metal interconnect fingers extend from the body of a chip provide for chip interconnection. The metal fingers are isolated from the body of the chip by a stress-relief spacer. In one example, such isolation takes the form of an air gap. In another example, such isolation takes the form of an elastomer material. In either case, mismatch in coefficient of thermal expansion between the metal interconnect fingers and the body of the chip is avoided, alleviating the problems associated with cracking and delamination, and leading to improved device yield and device reliability.
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