发明申请
US20090273098A1 Enhanced Architectural Interconnect Options Enabled With Flipped Die on a Multi-Chip Package
失效
在多芯片封装上启用带有倒装芯片的增强型架构互连选项
- 专利标题： Enhanced Architectural Interconnect Options Enabled With Flipped Die on a Multi-Chip Package
- 专利标题（中）： 在多芯片封装上启用带有倒装芯片的增强型架构互连选项
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申请号： US12113389申请日： 2008-05-01
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公开(公告)号： US20090273098A1公开(公告)日： 2009-11-05
- 发明人: Gerald Keith Bartley , Darryl John Becker , Paul Eric Dahlen , Philip Raymond Germann , Andrew Benson Maki , Mark Owen Maxson
- 申请人： Gerald Keith Bartley , Darryl John Becker , Paul Eric Dahlen , Philip Raymond Germann , Andrew Benson Maki , Mark Owen Maxson
- 主分类号： H01L21/50
- IPC分类号： H01L21/50 ; H01L23/48
摘要：
A particular chip is designed having a first variant (front side connected chip) of the chip and a second variant (back side connected chip). The first variant of the chip is attached to a carrier. The second variant of the chip is attached to the carrier inverted relative to the first variant of the chip. The first and second variants of the chip are attached to the carrier such that a vertical surface (side) of the first variant of the chip faces a corresponding vertical surface of the second variant of the chip. A circuit on the first variant of the chip is electrically connected to a corresponding circuit on the second variant of the chip.
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