发明申请
- 专利标题: SEMICONDUCTOR DEVICE
- 专利标题(中): 半导体器件
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申请号: US12430067申请日: 2009-04-25
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公开(公告)号: US20090273961A1公开(公告)日: 2009-11-05
- 发明人: Kazuo ONO , Riichiro Takemura , Tomonori Sekiguchi
- 申请人: Kazuo ONO , Riichiro Takemura , Tomonori Sekiguchi
- 专利权人: HITACHI, LTD.
- 当前专利权人: HITACHI, LTD.
- 优先权: JPJP2008-120466 20080502
- 主分类号: G11C5/02
- IPC分类号: G11C5/02 ; G11C11/00 ; G11C7/00
摘要:
A technique for increasing rewriting current without increasing a power supply voltage and also reducing location dependency inside a memory array of a resistive state after the rewriting is provided in a resistance change memory in which the resistance value of a memory cell changes between logical values “1” and “0”. In the resistance change memory, bit lines are formed into a layered structure, the bit line select switches for connecting to the global bit line are provided at both ends of the local bit line, and a control method of the bit line select switches is changed in the writing and the reading, thereby realizing the optimum array configurations for each of them. More specifically, in the writing and the reading, two current paths are provided in parallel by turning ON the bit line select switches simultaneously.
公开/授权文献
- US08102695B2 Semiconductor device 公开/授权日:2012-01-24
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