发明申请
- 专利标题： ELECTRICAL CONNECTIONS FOR MULTICHIP MODULES
- 专利标题（中）： 多模块模块的电气连接
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申请号： US12575586申请日： 2009-10-08
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公开(公告)号： US20100019397A1公开(公告)日： 2010-01-28
- 发明人: Sunpil Youn , Seok-Chan Lee
- 申请人： Sunpil Youn , Seok-Chan Lee
- 优先权： KR2007-0073476 20070723
- 主分类号： H01L23/48
- IPC分类号： H01L23/48 ; H01L21/78 ; H01L21/50
摘要：
Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated
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