公开(公告)号：US20110285034A1

公开(公告)日：2011-11-24

申请号：US13154296

申请日：2011-06-06

申请人： Sunpil Youn ,  Seok-Chan Lee

发明人： Sunpil Youn ,  Seok-Chan Lee

IPC分类号： H01L23/48

CPC分类号： H01L23/522 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated

摘要翻译： 导电线形成在包含多个电路的晶片上。 导线与晶片内形成的电路隔离。 芯片安装在晶片上，并且其芯片焊盘连接到晶片的导线。 然后可用包装树脂保护晶片，并将其切片

公开(公告)号：US20100019397A1

公开(公告)日：2010-01-28

申请号：US12575586

申请日：2009-10-08

申请人： Sunpil Youn ,  Seok-Chan Lee

发明人： Sunpil Youn ,  Seok-Chan Lee

IPC分类号： H01L23/48 ,  H01L21/78 ,  H01L21/50

CPC分类号： H01L23/522 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated

摘要翻译： 导电线形成在包含多个电路的晶片上。 导线与晶片内形成的电路隔离。 芯片安装在晶片上，并且其芯片焊盘连接到晶片的导线。 然后可用包装树脂保护晶片，并将其切片

公开(公告)号：US08207617B2

公开(公告)日：2012-06-26

申请号：US13154296

申请日：2011-06-06

申请人： Sunpil Youn ,  Seok-Chan Lee

发明人： Sunpil Youn ,  Seok-Chan Lee

IPC分类号： H01L29/40

CPC分类号： H01L23/522 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated.

摘要翻译： 导电线形成在包含多个电路的晶片上。 导线与晶片内形成的电路隔离。 芯片安装在晶片上，并且其芯片焊盘连接到晶片的导线。 然后可用包装树脂保护晶片，并将其切片。

公开(公告)号：US07972902B2

公开(公告)日：2011-07-05

申请号：US12575586

申请日：2009-10-08

申请人： Sunpil Youn ,  Seok-Chan Lee

发明人： Sunpil Youn ,  Seok-Chan Lee

IPC分类号： H01L21/44

CPC分类号： H01L23/522 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/528 ,  H01L23/5286 ,  H01L24/05 ,  H01L24/06 ,  H01L24/16 ,  H01L24/48 ,  H01L24/49 ,  H01L24/81 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04042 ,  H01L2224/05553 ,  H01L2224/05556 ,  H01L2224/16145 ,  H01L2224/16237 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48095 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48228 ,  H01L2224/48463 ,  H01L2224/49111 ,  H01L2224/4912 ,  H01L2224/49171 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/05042 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： Conductive lines are formed on a wafer containing multiple circuits. The conductive lines are isolated from the circuits formed within the wafer. Chips are mounted on the wafer and have their chip pads connected to the conductive lines of the wafer. The wafer may then be protected with a packaging resin and singulated.

摘要翻译： 导电线形成在包含多个电路的晶片上。 导线与晶片内形成的电路隔离。 芯片安装在晶片上，并且其芯片焊盘连接到晶片的导线。 然后可用包装树脂保护晶片，并将其切片。

公开(公告)号：US08766455B2

公开(公告)日：2014-07-01

申请号：US13239885

申请日：2011-09-22

申请人： SeYoung Jeong ,  Sunpil Youn ,  Hogeon Song

发明人： SeYoung Jeong ,  Sunpil Youn ,  Hogeon Song

IPC分类号： B23B15/00 ,  H01L23/488

CPC分类号： H01L23/481 ,  H01L24/81 ,  H01L25/0657 ,  H01L27/108 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/351 ,  Y10T428/12708 ,  H01L2924/00

摘要： A semiconductor device includes a first semiconductor chip, a first connection structure disposed on a first side of the first semiconductor chip, a second semiconductor chip disposed on a second side of the first semiconductor chip, and a second connection structure disposed between the first and second semiconductor chips, wherein a number of the second connection structures is less than a number of the first connection structures.

摘要翻译： 半导体器件包括第一半导体芯片，设置在第一半导体芯片的第一侧上的第一连接结构，设置在第一半导体芯片的第二侧上的第二半导体芯片，以及设置在第一和第二半导体芯片之间的第二连接结构 半导体芯片，其中多个第二连接结构小于多个第一连接结构。

公开(公告)号：US09502345B2

公开(公告)日：2016-11-22

申请号：US12705846

申请日：2010-02-15

申请人： Sunpil Youn ,  Kwanyoung Oh

发明人： Sunpil Youn ,  Kwanyoung Oh

IPC分类号： H01L23/48 ,  H01L23/50 ,  H01L25/065 ,  H01L23/00

CPC分类号： H01L23/50 ,  H01L24/29 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A multiple-chip-package (MCP) has multiple chip groups and multiple package terminal groups for electrical connections in the MCP. Semiconductor chips of the same chip group are electrically connected to the package terminals of the same package terminal group, while package terminals of different chip groups are electrically connected to the package terminals of different package terminal groups.

摘要翻译： 多芯片封装（MCP）具有多个芯片组和多个封装端子组，用于MCP中的电气连接。 同一芯片组的半导体芯片电连接到同一封装端子组的封装端子，而不同芯片组的封装端子电连接到不同封装端子组的封装端子。

公开(公告)号：US08659136B2

公开(公告)日：2014-02-25

申请号：US12712284

申请日：2010-02-25

申请人： Sunpil Youn ,  Kwanyoung Oh

发明人： Sunpil Youn ,  Kwanyoung Oh

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  G11C5/02 ,  G11C5/04 ,  H01L23/3128 ,  H01L23/481 ,  H01L23/50 ,  H01L24/05 ,  H01L24/32 ,  H01L24/96 ,  H01L2224/02381 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/05008 ,  H01L2224/05548 ,  H01L2224/05553 ,  H01L2224/0557 ,  H01L2224/12105 ,  H01L2224/13009 ,  H01L2224/16145 ,  H01L2224/16146 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2224/73259 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05552

摘要： A memory module includes a first multichip package including a first master chip and a first plurality of slave chips, and a second multichip package, the second multichip package including a second master chip and a second plurality of slave chips. A first through via passes through the first master chip and electrically connects to the first master chip to provide a supply voltage to the first master chip. A second through via passes through the first master chip without being electrically connected to provide a supply voltage to the first master chip. A first set of additional through vias pass through respective ones of the first plurality of slave chips and electrically connect to the respective ones of the first plurality of slave chips, wherein the second through via and first set of additional through vias are aligned to form a first stack of through vias.

摘要翻译： 存储器模块包括第一多芯片封装，其包括第一主芯片和第一多个从芯片，以及第二多芯片封装，所述第二多芯片封装包括第二主芯片和第二多个从芯片。 第一通孔通过第一主芯片并电连接到第一主芯片以向第一主芯片提供电源电压。 第二通孔穿过第一主芯片而不被电连接以向第一主芯片提供电源电压。 第一组附加通孔穿过第一多个从芯片中的相应的通孔，并且电连接到第一多个从芯片中的相应的从芯片，其中第二通孔和第一组额外的通孔对齐以形成 第一叠通孔。

公开(公告)号：US20110037158A1

公开(公告)日：2011-02-17

申请号：US12705846

申请日：2010-02-15

申请人： Sunpil Youn ,  Kwanyoung Oh

发明人： Sunpil Youn ,  Kwanyoung Oh

IPC分类号： H01L25/065 ,  H01L23/498

CPC分类号： H01L23/50 ,  H01L24/29 ,  H01L24/33 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/0657 ,  H01L2224/05554 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/48227 ,  H01L2224/49112 ,  H01L2224/49113 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01058 ,  H01L2924/01073 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/078 ,  H01L2924/07802 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/181 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A multiple-chip-package (MCP) has multiple chip groups and multiple package terminal groups for electrical connections in the MCP. Semiconductor chips of the same chip group are electrically connected to the package terminals of the same package terminal group, while package terminals of different chip groups are electrically connected to the package terminals of different package terminal groups.

摘要翻译： 多芯片封装（MCP）具有多个芯片组和多个封装端子组，用于MCP中的电气连接。 同一芯片组的半导体芯片电连接到同一封装端子组的封装端子，而不同芯片组的封装端子电连接到不同封装端子组的封装端子。

公开(公告)号：US08643193B2

公开(公告)日：2014-02-04

申请号：US13630619

申请日：2012-09-28

申请人： Hye-Jin Kim ,  Byung-Seo Kim ,  Sunpil Youn

发明人： Hye-Jin Kim ,  Byung-Seo Kim ,  Sunpil Youn

IPC分类号： H01L23/48

CPC分类号： H01L25/0657 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48147 ,  H01L2224/4911 ,  H01L2225/06506 ,  H01L2225/06527 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/014 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A plurality of semiconductor chips may be stacked on the substrate, and each of them may include at least one electrode pad. At least one of the plurality of semiconductor chips may include at least one redistribution pad configured to electrically connect with the at least one electrode pad.

公开(公告)号：US20120235305A1

公开(公告)日：2012-09-20

申请号：US13420995

申请日：2012-03-15

申请人： Ji-Hwang KIM ,  Sunpil Youn ,  Sangwon Kim ,  Kwang-chul Choi ,  Tae Hong Min

发明人： Ji-Hwang KIM ,  Sunpil Youn ,  Sangwon Kim ,  Kwang-chul Choi ,  Tae Hong Min

IPC分类号： H01L23/522

CPC分类号： H01L21/76898 ,  H01L21/563 ,  H01L21/768 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/36 ,  H01L23/481 ,  H01L23/49816 ,  H01L2224/02372 ,  H01L2224/0401 ,  H01L2224/0557 ,  H01L2224/16146 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2225/06568 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/00 ,  H01L2224/05552

摘要： A semiconductor device includes a substrate having a first side and a second side such that the first and second sides face each other, a through via plug penetrating the substrate, an insulating film liner, and an antipollution film. The insulating film liner is between the through via plug and the substrate and the insulating film liner has a recessed surface with respect to the second side. The antipollution film covers the second side and the antipollution film is on the recessed surface and between the through via plug and the substrate.

摘要翻译： 半导体器件包括具有第一侧和第二侧的基板，使得第一和第二面彼此面对，贯穿基板的通孔塞，绝缘膜衬垫和防污染膜。 绝缘膜衬垫位于通孔插塞和衬底之间，并且绝缘膜衬套相对于第二侧具有凹陷表面。 防污染膜覆盖第二面，防污染膜位于凹陷表面上，并且在通孔插塞和基底之间。