A PLL frequency synthesizer 1 according to one embodiment of the present invention is provided with a frequency divider 30, a phase comparator 40, a charge pump 50, a loop filter 60, a voltage controlled oscillator 70, and a changeover switch (within the switching unit 80). The loop filter 60 has a reference potential on a semiconductor substrate as a ground potential, and the changeover switch is formed on the semiconductor substrate 2 and switches connection between an intermediate node of the loop filter 60 and the reference potential on the semiconductor substrate 2 to switch the time constant of the loop filter 60.