发明申请
- 专利标题: SAMPLE/HOLD CIRCUIT, AND ANALOG-TO-DIGITAL CONVERTER
- 专利标题(中): 样品/保持电路和模拟数字转换器
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申请号: US12469736申请日: 2009-05-21
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公开(公告)号: US20100066581A1公开(公告)日: 2010-03-18
- 发明人: Tomohiko Ito
- 申请人: Tomohiko Ito
- 申请人地址: JP Tokyo
- 专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人: KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址: JP Tokyo
- 优先权: JP2008-135758 20080523
- 主分类号: H03M1/34
- IPC分类号: H03M1/34 ; G11C27/02 ; H03M1/12
摘要:
There is disclosed a sample-and-hold circuit. An operational amplifier includes an inverting input terminal, a non-inverting input terminal, an inverting output terminal, and a non-inverting output terminal. First and second groups of capacitors are operated in first to third modes periodically. Positive and negative input signals are input to charge an electric charge in the first mode, electric charge are held while positive and negative output signals are output from the operational amplifier by connecting between the inverting input terminal and the non-inverting output terminal and by connecting between the non-inverting input terminal and the inverting output terminal in the second mode, and electric charge are discharged in the third mode. Second group of capacitors shifts to the third mode when first group of capacitors is in the first or second mode, and shift to the first or second mode when first group of capacitors is in the third mode.
公开/授权文献
- US07868797B2 Sample/hold circuit, and analog-to-digital converter 公开/授权日:2011-01-11
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