A method for manufacturing an array substrate of liquid crystal display comprising the following steps: providing a substrate having gate lines, a gate insulating layer and an active layer pattern formed thereon in this order; depositing a first transparent conductive layer and a source/drain metal layer in this order on the substrate; forming a photoresist pattern layer on the source/drain metal layer through a triple-tone mask; performing a wet-etching process on the source/drain metal layer and the first transparent conductive layer exposed from the photoresist pattern layer; performing a first ashing process on the photoresist pattern layer and performing a dry-etching process on the source/drain metal layer, the first transparent conductive layer and the active layer pattern exposed by the first ashing process; performing a second ashing process on the photoresist pattern layer and performing a wet-etching process on the source/drain metal layer exposed by the second ashing process; and removing the remaining photoresist pattern layer. According to the invention, the over-etching on the TFT channel region can be reduced and the display quality of the liquid crystal display can be ensured.