发明申请
- 专利标题: METHOD FOR MANUFACTURING PRINTED WIRING BOARD AND PRINTED WIRING BOARD
- 专利标题(中): 制造印刷电路板和印刷电路板的方法
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申请号: US12533454申请日: 2009-07-31
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公开(公告)号: US20100078213A1公开(公告)日: 2010-04-01
- 发明人: Toshiki FURUTANI , Takeshi Furusawa
- 申请人: Toshiki FURUTANI , Takeshi Furusawa
- 申请人地址: JP Ogaki-shi
- 专利权人: IBIDEN CO., LTD
- 当前专利权人: IBIDEN CO., LTD
- 当前专利权人地址: JP Ogaki-shi
- 主分类号: H05K1/11
- IPC分类号: H05K1/11 ; H05K3/46 ; C23F1/02 ; C25D5/02
摘要:
A method for manufacturing a printed wiring board, in which filled vias with a reduction in faulty connections are formed, and providing such a printed wiring board. After an electroless plated film is formed on an inner wall of a via opening, electrolytic plating is performed on insulative resin base material; the via opening is filled with plating metal and a filled via is formed. Therefore, during electrolytic plating, a plating metal is deposited from electroless plated film on the side wall of the via opening as well as from the bottom of the via opening. As a result, the via opening may be completely filled through electrolytic plating, forming a filled via with a reduction in faulty connections.
公开/授权文献
- US08365402B2 Method for manufacturing printed wiring board 公开/授权日:2013-02-05
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