发明申请
US20100100860A1 METHOD AND APPARATUS FOR DEBUGGING AN ELECTRONIC SYSTEM DESIGN (ESD) PROTOTYPE
审中-公开
用于调试电子系统设计(ESD)原型的方法和装置
- 专利标题: METHOD AND APPARATUS FOR DEBUGGING AN ELECTRONIC SYSTEM DESIGN (ESD) PROTOTYPE
- 专利标题(中): 用于调试电子系统设计(ESD)原型的方法和装置
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申请号: US12255606申请日: 2008-10-21
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公开(公告)号: US20100100860A1公开(公告)日: 2010-04-22
- 发明人: Chioumin M. Chang , Thomas B. Huang , Huan-Chih Tsai
- 申请人: Chioumin M. Chang , Thomas B. Huang , Huan-Chih Tsai
- 主分类号: G06F17/50
- IPC分类号: G06F17/50
摘要:
Using a vector-based emulation technique, a hardware-based prototyping system reduces time-consuming recompilation and reduces the iteration time for a verification run. The vector-based emulation technique takes advantage of information derived from user-defined probe points, automatically generated probe points and low-latency snapshots. Using a bounded-cycle simulation technique, the hardware-based prototyping system can provide complete or partial simulation traces covering interested signals and can efficiently evaluates assertions. A user is therefore able to debug in a real system test and to identify causes of fault conditions interactively under a controlled vector debugging environment.
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