发明申请
US20100125761A1 SYSTEM AND METHOD FOR WAFER-LEVEL ADJUSTMENT OF INTEGRATED CIRCUIT CHIPS
审中-公开
用于集成电路卡的水平调整的系统和方法
- 专利标题: SYSTEM AND METHOD FOR WAFER-LEVEL ADJUSTMENT OF INTEGRATED CIRCUIT CHIPS
- 专利标题(中): 用于集成电路卡的水平调整的系统和方法
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申请号: US12465579申请日: 2009-05-13
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公开(公告)号: US20100125761A1公开(公告)日: 2010-05-20
- 发明人: Seok Bong HYUN , Hee Tae LEE , Kyung Hwan PARK , Sung Weon KANG , Heyung Sub LEE
- 申请人: Seok Bong HYUN , Hee Tae LEE , Kyung Hwan PARK , Sung Weon KANG , Heyung Sub LEE
- 申请人地址: KR Daejeon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejeon
- 优先权: KR10-2008-0113434 20081114
- 主分类号: G06F11/00
- IPC分类号: G06F11/00
摘要:
A system and method for wafer level adjusting of IC chips are disclosed. The system and method for a wafer level adjustment of IC chips connect the analog circuits of the IC chip with the adjustment controller outside the semiconductor wafer via the probing region and the signal transmission region outside the IC chip, measure and adjust the performance of the IC chip by the adjustment controller, and then, only store final adjustment data in the adjustment memory of the IC chip. Accordingly, it is possible to reduce the area of adjustment circuits added to an integrated circuit chip such as an RFID tag chip and adjust the performance of chips at a wafer level.
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