发明申请
US20100138729A1 Pseudorandom binary sequence checker with control circuitry for end-of-test check 有权
具有用于测试结束检查的控制电路的伪随机二进制序列检查器

  • 专利标题: Pseudorandom binary sequence checker with control circuitry for end-of-test check
  • 专利标题(中): 具有用于测试结束检查的控制电路的伪随机二进制序列检查器
  • 申请号: US12324920
    申请日: 2008-11-28
  • 公开(公告)号: US20100138729A1
    公开(公告)日: 2010-06-03
  • 发明人: Si Ruo ChenHao LiJin Song LiuTao Wang
  • 申请人: Si Ruo ChenHao LiJin Song LiuTao Wang
  • 主分类号: G06F11/07
  • IPC分类号: G06F11/07
Pseudorandom binary sequence checker with control circuitry for end-of-test check
摘要:
Control circuitry is coupled between an error event output and a data input of a pseudorandom binary sequence (PRBS) checker. The control circuitry is configured to switch between a first operating state in which a received PRBS signal is applied to the data input of the PRBS checker and a second operating state in which an error signal is applied to the data input of the PRBS checker, responsive to detection of a designated condition of the PRBS checker. In an illustrative embodiment, the designated condition is an end-of-test condition indicating that the PRBS checker has completed a test involving the received PRBS signal.
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