发明申请
- 专利标题： INTEGRATED CIRCUIT PACKAGING SYSTEM WITH EXPOSED TERMINAL INTERCONNECTS AND METHOD OF MANUFACTURE THEREOF
- 专利标题（中）： 一体化电路包装系统及其制造方法
-
申请号： US12331416申请日： 2008-12-09
-
公开(公告)号： US20100140789A1公开(公告)日： 2010-06-10
- 发明人: Arnel Senosa Trasporto , Lionel Chien Hui Tay , Zigmund Ramirez Camacho , Abelardo Jr. Hadap Advincula
- 申请人： Arnel Senosa Trasporto , Lionel Chien Hui Tay , Zigmund Ramirez Camacho , Abelardo Jr. Hadap Advincula
- 主分类号： H01L23/495
- IPC分类号： H01L23/495 ; H01L21/00
摘要：
A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.
公开/授权文献
信息查询
IPC分类:
