公开(公告)号：US20100140789A1

公开(公告)日：2010-06-10

申请号：US12331416

申请日：2008-12-09

申请人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula

发明人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Jr. Hadap Advincula

IPC分类号： H01L23/495 ,  H01L21/00

CPC分类号： H01L23/49548 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/4952 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06568 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供引线; 安装内部封装，使得引线是内部封装的周边，并且内部封装具有连接焊盘; 在连接焊盘上形成暴露的端子互连; 并封装内部封装，并用封装部分地封装暴露的端子互连。

公开(公告)号：US08664038B2

公开(公告)日：2014-03-04

申请号：US12328759

申请日：2008-12-04

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Jose Alvin Caparas

IPC分类号： H01L21/00

CPC分类号： H01L23/49575 ,  H01L23/49503 ,  H01L23/49548 ,  H01L24/28 ,  H01L24/32 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01076 ,  H01L2924/01082 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A method of manufacture of an integrated circuit packaging system includes: forming a package paddle and a terminal adjacent to the package paddle; mounting a stack paddle over the package paddle with the stack paddle at a non-center offset with the package paddle; mounting a stack integrated circuit over the stack paddle; and encapsulating the stack integrated circuit and the stack paddle.

摘要翻译： 一种集成电路封装系统的制造方法，包括：形成封装焊盘和邻近封装焊盘的端子; 将堆叠桨安装在封装桨上方，堆叠桨与封装桨形件在非中心偏移处; 在堆叠桨上安装堆叠集成电路; 并封装堆叠集成电路和堆叠桨。

公开(公告)号：US07977779B2

公开(公告)日：2011-07-12

申请号：US12136768

申请日：2008-06-10

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

IPC分类号： H01L23/50

CPC分类号： H01L23/49548 ,  H01L21/4832 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49541 ,  H01L23/49816 ,  H01L23/5389 ,  H01L24/24 ,  H01L24/29 ,  H01L24/48 ,  H01L24/73 ,  H01L25/03 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/24226 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/2929 ,  H01L2224/29299 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/83411 ,  H01L2224/83424 ,  H01L2224/83439 ,  H01L2224/83444 ,  H01L2224/83447 ,  H01L2224/83455 ,  H01L2224/85001 ,  H01L2225/0651 ,  H01L2225/06524 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/09701 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15311 ,  H01L2924/15747 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/30105 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/0105 ,  H01L2924/0665 ,  H01L2224/29099 ,  H01L2224/29199 ,  H01L2224/05599 ,  H01L2224/45015 ,  H01L2924/207

摘要： A mountable integrated circuit package-in-package system includes: providing an interface integrated circuit package system with a terminal having a plated bumped portion of an inner encapsulation; mounting the interface integrated circuit package system over a package carrier with the terminal facing away from the package carrier; connecting the package carrier and a pad extension of the terminal; and forming a package encapsulation over the interface integrated circuit package system with the terminal exposed.

摘要翻译： 一种可安装的集成电路封装包装系统，包括：提供具有内部封装的镀覆凸起部分的端子的接口集成电路封装系统; 将接口集成电路封装系统安装在封装载体上，端子背离封装载体; 连接封装载体和端子的焊盘延伸部; 并在接口集成电路封装系统上形成封装封装，端子暴露。

公开(公告)号：US07919850B2

公开(公告)日：2011-04-05

申请号：US12331416

申请日：2008-12-09

申请人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Hadap Advincula, Jr.

发明人： Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Zigmund Ramirez Camacho ,  Abelardo Hadap Advincula, Jr.

IPC分类号： H01L23/04 ,  H01L23/02

CPC分类号： H01L23/49548 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/4952 ,  H01L23/49531 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L25/03 ,  H01L25/105 ,  H01L2224/05553 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2224/92247 ,  H01L2225/06568 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a lead; mounting an inner package so that the lead is peripheral to the inner package, and the inner package having a connection pad; forming an exposed terminal interconnect on the connection pad; and encapsulating the inner package, and partially encapsulating the exposed terminal interconnect with an encapsulation.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供引线; 安装内部封装，使得引线是内部封装的周边，并且内部封装具有连接焊盘; 在连接焊盘上形成暴露的端子互连; 并封装内部封装，并用封装部分地封装暴露的端子互连。

公开(公告)号：US20110068458A1

公开(公告)日：2011-03-24

申请号：US12565144

申请日：2009-09-23

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/3107 ,  H01L23/49575 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a first device having a first exposed side and a first inward side; connecting a second device having a second exposed side and a second inward side facing the first inward side to the first device, the second device having planar dimensions less than planar dimensions of the first device; connecting a system connector to a perimeter of the first inward side, the system connector having an exposed leg partially vertical and an exposed foot partially horizontal; and applying an encapsulant exposing the first exposed side, the second exposed side, the exposed leg, and the exposed foot, the exposed leg offset from the encapsulant, the exposed foot on an end of the system connector opposite the first device.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有第一暴露侧和第一内侧的第一器件; 将具有第二暴露侧和面向所述第一内侧的第二内侧的第二装置连接到所述第一装置，所述第二装置具有小于所述第一装置的平面尺寸的平面尺寸; 将系统连接器连接到第一内侧的周边，系统连接器具有部分垂直的暴露的腿和暴露的脚部分水平; 以及施加暴露所述第一暴露侧，所述第二暴露侧，所述暴露腿和所述暴露的脚的密封剂，暴露的腿偏离所述密封剂，所述暴露的脚在所述系统连接器的与所述第一装置相对的端部上。

公开(公告)号：US20100308467A1

公开(公告)日：2010-12-09

申请号：US12858593

申请日：2010-08-18

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L23/538 ,  H01L21/78 ,  H01L21/50

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

公开(公告)号：US08729693B2

公开(公告)日：2014-05-20

申请号：US12565144

申请日：2009-09-23

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Lionel Chien Hui Tay ,  Henry Descalzo Bathan

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L23/3107 ,  H01L23/49575 ,  H01L24/17 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2224/16245 ,  H01L2224/32145 ,  H01L2224/73204 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/1029 ,  H01L2225/1058 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/18161 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a first device having a first exposed side and a first inward side; connecting a second device having a second exposed side and a second inward side facing the first inward side to the first device, the second device having planar dimensions less than planar dimensions of the first device; connecting a system connector to a perimeter of the first inward side, the system connector having an exposed leg partially vertical and an exposed foot partially horizontal; and applying an encapsulant exposing the first exposed side, the second exposed side, the exposed leg, and the exposed foot, the exposed leg offset from the encapsulant, the exposed foot on an end of the system connector opposite the first device.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有第一暴露侧和第一内侧的第一器件; 将具有第二暴露侧和面向所述第一内侧的第二内侧的第二装置连接到所述第一装置，所述第二装置具有小于所述第一装置的平面尺寸的平面尺寸; 将系统连接器连接到第一内侧的周边，系统连接器具有部分垂直的暴露的腿和暴露的脚部分水平; 以及施加暴露所述第一暴露侧，所述第二暴露侧，所述暴露腿和所述暴露的脚的密封剂，暴露的腿偏离所述密封剂，所述暴露的脚在所述系统连接器的与所述第一装置相对的端部上。

公开(公告)号：US20100311206A1

公开(公告)日：2010-12-09

申请号：US12858615

申请日：2010-08-18

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L21/50 ,  H01L21/78 ,  H01L21/56 ,  H01L21/768

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

摘要翻译： 半导体晶片包含多个半导体管芯。 切割半导体晶片以分离半导体管芯。 将半导体管芯转移到载体上。 在载体上的半导体管芯的周围形成管芯延伸区域。 载体被移除。 在管芯延伸区域中的第一和第二偏移行中形成多个通孔通孔（THV）。 导电材料沉积在THV中。 第一RDL形成在半导体管芯上的接触焊盘和THV之间。 第二RDL形成在与THV电接触的半导体管芯的背面上。 形成与第二RDL电接触的凸块下金属化。 在凸块下方形成焊料凸块。 单芯片延伸区域以分离半导体管芯。

公开(公告)号：US07790576B2

公开(公告)日：2010-09-07

申请号：US11947377

申请日：2007-11-29

申请人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

发明人： Henry Descalzo Bathan ,  Zigmund Ramirez Camacho ,  Lionel Chien Hui Tay ,  Arnel Senosa Trasporto

IPC分类号： H01L21/30

CPC分类号： H01L24/97 ,  H01L21/561 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3107 ,  H01L24/19 ,  H01L24/82 ,  H01L24/96 ,  H01L2224/04105 ,  H01L2224/24137 ,  H01L2224/82001 ,  H01L2224/82039 ,  H01L2224/97 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/12044 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/30105 ,  H01L2224/82 ,  H01L2924/00

摘要： A semiconductor wafer contains a plurality of semiconductor die. The semiconductor wafer is diced to separate the semiconductor die. The semiconductor die are transferred onto a carrier. A die extension region is formed around a periphery of the semiconductor die on the carrier. The carrier is removed. A plurality of through hole vias (THV) is formed in first and second offset rows in the die extension region. A conductive material is deposited in the THVs. A first RDL is formed between contact pads on the semiconductor die and the THVs. A second RDL is formed on a backside of the semiconductor die in electrical contact with the THVs. An under bump metallization is formed in electrical contact with the second RDL. Solder bumps are formed on the under bump metallization. The die extension region is singulated to separate the semiconductor die.

摘要翻译： 半导体晶片包含多个半导体管芯。 切割半导体晶片以分离半导体管芯。 将半导体管芯转移到载体上。 在载体上的半导体管芯的周围形成管芯延伸区域。 载体被移除。 在管芯延伸区域中的第一和第二偏移行中形成多个通孔通孔（THV）。 导电材料沉积在THV中。 第一RDL形成在半导体管芯上的接触焊盘和THV之间。 第二RDL形成在与THV电接触的半导体管芯的背面上。 形成与第二RDL电接触的凸块下金属化。 在凸块下方形成焊料凸块。 单芯片延伸区域以分离半导体管芯。

公开(公告)号：US20100029046A1

公开(公告)日：2010-02-04

申请号：US12185616

申请日：2008-08-04

申请人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Reza Argenty Pagaila ,  Lionel Chien Hui Tay

发明人： Zigmund Ramirez Camacho ,  Arnel Senosa Trasporto ,  Reza Argenty Pagaila ,  Lionel Chien Hui Tay

IPC分类号： H01L21/56

CPC分类号： H01L21/568 ,  H01L23/3107 ,  H01L24/48 ,  H01L2224/32245 ,  H01L2224/45014 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/85001 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An integrated circuit package system includes: connecting a concave terminal and an integrated circuit; and forming an encapsulation, having a bottom side, over the integrated circuit and the concave terminal with the concave terminal within the encapsulation.

摘要翻译： 集成电路封装系统包括：连接凹端和集成电路; 并且在封装内形成具有底侧的集成电路和具有凹形端子的凹形端子的封装。