A buffer circuit is described for buffering signals between a circuit element and a load. The buffer includes a main transistor and a cascode transistor, as well as a distribution line for transferring signals over a distance between the circuit element and the load. The buffer is arranged in a remote cascode topology such that the cascode transistor is located substantially adjacent to the load and remote from the main transistor. The distribution line transfers signals over the distance from the main transistor to the cascode transistor. This remote cascode topology makes it possible to significantly reduce the power consumption of the buffer—as compared to conventional buffers—while maintaining the maximum bandwidth possible.