发明申请
- 专利标题： DUMMY VIAS FOR DAMASCENE PROCESS
- 专利标题（中）： DAMASCENE过程的DUMMY VIAS
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申请号： US12716980申请日： 2010-03-03
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公开(公告)号： US20100155963A1公开(公告)日： 2010-06-24
- 发明人: Kuei Shun Chen , Chin-Hsiang Lin , Vencent Chang , Lawrence Lin , Lai Chien Wen , Jhun Hua Chen
- 申请人： Kuei Shun Chen , Chin-Hsiang Lin , Vencent Chang , Lawrence Lin , Lai Chien Wen , Jhun Hua Chen
- 申请人地址： TW Hsin-Chu
- 专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人： TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
- 当前专利权人地址： TW Hsin-Chu
- 主分类号： H01L23/48
- IPC分类号： H01L23/48
摘要：
An integrated circuit device and method of making the integrated circuit device are disclosed. An exemplary apparatus includes: a semiconductor layer; and a dielectric layer on the semiconductor layer, the dielectric layer having conductive vias and dummy vias formed therein, wherein the conductive vias and dummy vias extend varying distances into the dielectric layer, the conductive vias extending through the dielectric layer to the semiconductor layer, and the dummy vias extending through the dielectric layer to a distance above the semiconductor layer.
公开/授权文献
- US07960821B2 Dummy vias for damascene process 公开/授权日：2011-06-14
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