发明申请
US20100162055A1 MEMORY SYSTEM, TRANSFER CONTROLLER, AND MEMORY CONTROL METHOD
审中-公开
存储系统，传输控制器和存储器控制方法
- 专利标题： MEMORY SYSTEM, TRANSFER CONTROLLER, AND MEMORY CONTROL METHOD
- 专利标题（中）： 存储系统，传输控制器和存储器控制方法
-
申请号： US12558718申请日： 2009-09-14
-
公开(公告)号： US20100162055A1公开(公告)日： 2010-06-24
- 发明人: Takeo Morita , Akira Aoki , Tetsuya Murakami
- 申请人： Takeo Morita , Akira Aoki , Tetsuya Murakami
- 申请人地址： JP Tokyo
- 专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人： KABUSHIKI KAISHA TOSHIBA
- 当前专利权人地址： JP Tokyo
- 优先权： JP2008-328465 20081224
- 主分类号： G06F11/00
- IPC分类号： G06F11/00 ; G06F12/00
摘要：
A memory system includes a nonvolatile memory, a volatile buffer memory connected to the nonvolatile memory, an error counting unit that detects, for each of divided areas formed by dividing a storage area of the volatile buffer memory into a plurality of areas, a parity error in inputting data to and outputting data from the divided areas and counts a number of times of accumulation of the parity error, and a control unit that sets the divided area, in which the number of times of accumulation of the parity error counted by the error counting unit exceeds a predetermined number of times, in a disabled state.
信息查询
