发明申请
- 专利标题： SEMICONDUCTOR DEVICE HAVING ELECTRICAL FUSES WITH LESS POWER CONSUMPTION AND INTERCONNECTION ARRANGEMENT
- 专利标题（中）： 具有低功耗和互连布置的电熔丝的半导体器件
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申请号： US12723218申请日： 2010-03-12
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公开(公告)号： US20100165775A1公开(公告)日： 2010-07-01
- 发明人: Shigeki OBAYASHI , Toshiaki Yonezu , Tokeshi Iwamoto , Kazushi Kono , Masashi Arakawa , Takahiro Uchida
- 申请人： Shigeki OBAYASHI , Toshiaki Yonezu , Tokeshi Iwamoto , Kazushi Kono , Masashi Arakawa , Takahiro Uchida
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 优先权： JP2006-145759(P) 20060525
- 主分类号： G11C17/18
- IPC分类号： G11C17/18 ; H01L23/525
摘要：
In fuse program circuits, fuse element FS is implemented using metal interconnect at third or higher layer of multilayer metal interconnect. In each fuse program circuit, program information and fuse select information are sequentially transferred using a scan flip-flops, and fuses are selectively and electrically blown one by one. The fuse program circuit provided with fuse elements that can be programmed even after packaging is implemented with low power consumption and a low occupation area.
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