Invention Application
US20100167496A1 METHOD FOR FORMING DEVICE ISOLATION LAYER OF SEMICONDUCTOR DEVICE AND NON-VOLATILE MEMORY DEVICE
有权
形成半导体器件和非易失性存储器件的器件隔离层的方法
- Patent Title: METHOD FOR FORMING DEVICE ISOLATION LAYER OF SEMICONDUCTOR DEVICE AND NON-VOLATILE MEMORY DEVICE
- Patent Title (中): 形成半导体器件和非易失性存储器件的器件隔离层的方法
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Application No.: US12473307Application Date: 2009-05-28
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Publication No.: US20100167496A1Publication Date: 2010-07-01
- Inventor: Jae-Hyoung Koo , Jin-Woong Kim , Mi-Ri Lee , Chi-Ho Kim , Jin-Ho Bin
- Applicant: Jae-Hyoung Koo , Jin-Woong Kim , Mi-Ri Lee , Chi-Ho Kim , Jin-Ho Bin
- Priority: KR10-2008-0134781 20081226
- Main IPC: H01L21/762
- IPC: H01L21/762

Abstract:
A method for forming a device isolation layer of a semiconductor device or a non-volatile memory device is provided. A method for forming a device isolation layer of a semiconductor device includes: forming trenches having a first predetermined depth by etching a substrate; forming a first insulation layer having a second predetermined depth inside the trenches; forming a liner oxide layer having a predetermined thickness on internal walls of the trenches with the first insulation layer formed therein; and forming a second insulation layer for forming a device isolation layer over the substrate with the liner oxide layer formed therein, wherein the second insulation layer has a lower etch rate than that of the first insulation layer.
Public/Granted literature
- US08278185B2 Method for forming device isolation layer of semiconductor device and non-volatile memory device Public/Granted day:2012-10-02
Information query
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