发明申请
- 专利标题: System and Method for Reducing Transactional Abort Rates Using Compiler Optimization Techniques
- 专利标题(中): 使用编译器优化技术降低事务中止率的系统和方法
-
申请号: US12345189申请日: 2008-12-29
-
公开(公告)号: US20100169870A1公开(公告)日: 2010-07-01
- 发明人: David Dice
- 申请人: David Dice
- 主分类号: G06F9/44
- IPC分类号: G06F9/44
摘要:
In transactional memory systems, transactional aborts due to conflicts between concurrent threads may cause system performance degradation. A compiler may attempt to minimize runtime abort rates by performing one or more code transformations and/or other optimizations on a transactional memory program in an attempt to minimize one or more store-commit intervals. The compiler may employ store deferral, hoisting of long-latency operations from within a transaction body and/or store-commit interval, speculative hoisting of long-latency operations, and/or redundant store squashing optimizations. The compiler may perform optimizing transformations on source code and/or on any intermediate representation of the source code (e.g., parse trees, un-optimized assembly code, etc.). In some embodiments, the compiler may preemptively avoid naïve target code constructions. The compiler may perform static and/or dynamic analysis of a program in order to determine which, if any, transformations should be applied and/or may dynamically recompile code sections at runtime, based on execution analysis.
公开/授权文献
信息查询