Invention Application
US20100197089A1 METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH METAL-SEMICONDUCTOR COMPOUND SOURCE/DRAIN CONTACT REGIONS
审中-公开
用金属半导体复合源/漏极接触区制造半导体器件的方法
- Patent Title: METHODS OF FABRICATING SEMICONDUCTOR DEVICES WITH METAL-SEMICONDUCTOR COMPOUND SOURCE/DRAIN CONTACT REGIONS
- Patent Title (中): 用金属半导体复合源/漏极接触区制造半导体器件的方法
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Application No.: US12699491Application Date: 2010-02-03
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Publication No.: US20100197089A1Publication Date: 2010-08-05
- Inventor: Jin-Bum Kim , Yu-Gyun Shin , Jung-Yun Won , In-Sun Jung , Jun-Ho Lee
- Applicant: Jin-Bum Kim , Yu-Gyun Shin , Jung-Yun Won , In-Sun Jung , Jun-Ho Lee
- Assignee: Samsung Electronics Co., Ltd.
- Current Assignee: Samsung Electronics Co., Ltd.
- Priority: KR10-2009-0009378 20090205
- Main IPC: H01L21/8238
- IPC: H01L21/8238

Abstract:
Methods of fabricating semiconductor devices include forming a transistor on and/or in a semiconductor substrate, wherein the transistor includes a source/drain region and a gate pattern disposed on a channel region adjacent the source/drain region. An insulating layer is formed on the transistor and patterned to expose the source/drain region. A semiconductor source layer is formed on the exposed source/drain region and on an adjacent portion of the insulating layer. A metal source layer is formed on the semiconductor source layer. Annealing, is performed to form a first metal-semiconductor compound region on the source/drain region and a second metal-semiconductor compound region on the adjacent portion of the insulating layer. The first metal-semiconductor compound region may be thicker than the second metal-semiconductor compound region. The metal source layer may include a metal layer and a metal nitride barrier layer.
Information query
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