发明申请
US20100203712A1 PROCESS FOR FORMING A WIRE PORTION IN AN INTEGRATED ELECTRONIC CIRCUIT
有权
在一体化电子电路中形成电线部分的方法
- 专利标题： PROCESS FOR FORMING A WIRE PORTION IN AN INTEGRATED ELECTRONIC CIRCUIT
- 专利标题（中）： 在一体化电子电路中形成电线部分的方法
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申请号： US12679882申请日： 2008-09-22
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公开(公告)号： US20100203712A1公开(公告)日： 2010-08-12
- 发明人: Philippe Coronel , Benjamin Dumont , Arnaud Pouydebasque , Markus Müller
- 申请人： Philippe Coronel , Benjamin Dumont , Arnaud Pouydebasque , Markus Müller
- 优先权： EP07301401.1 20070926
- 国际申请： PCT/EP08/62622 WO 20080922
- 主分类号： H01L21/20
- IPC分类号： H01L21/20
摘要：
A process for forming a wire portion in an integrated electronic circuit includes epitaxially growing the wire portion on a side surface of a seed layer portion (11, 12). Cross-sectional dimensions of the wire portion correspond to a thickness of the seed layer portion and to a duration of the growing step. The seed layer portion is then selectively removed while the wire portion is retained fixedly on the circuit. Afterwards, heating of the circuit can cause the wire portion becoming rounded in cross-section. The wire portion obtained may be about 10 nanometers in diameter. It may be used for forming a channel of a MOS transistor devoid of short channel effect.
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