A non-volatile memory device comprises an array of non-volatile memory cells arranged in a plurality of rows and columns. Each memory cell has a bit terminal for connection to a bit line, a high voltage terminal for connection to a high voltage source, and a low voltage terminal for connection to a low voltage source. The array has a first side adjacent to a first column of memory cells, and a second side opposite the first side, a third side adjacent to a first row of memory cells, and a fourth side opposite the third side. The memory device further comprises a plurality of columns of reference memory cells embedded in the memory array, with a plurality of reference cells in each row of the array of non-volatile memory cells, substantially evenly spaced apart from one another. Each of the reference memory cells is substantially the same as the non-volatile memory cells, and has a bit terminal for connection to a bit line, a high voltage terminal for connection to a high voltage source and a low voltage terminal for connection to a low voltage source. A high voltage decoder is positioned on the first side, and has a plurality of high voltage lines, with each high voltage line connected to the high voltage terminal of the memory cells and reference cells in the same row. A low voltage row decoder is positioned on the second side, and has a plurality of low voltage lines, with each low voltage line connected to the low voltage terminal of the memory cells and reference cells in the same row. A plurality of sense amplifiers are positioned on the third side, with each sense amplifier connected to the bit terminal of one column of non-volatile memory cells and to the bit terminal of a column of reference memory cells. This invention also includes N-of-M selective reference scheme, distributed source line pull down, source line resistance strap compensation, replica-data-pattern current consumption, data current compensation, and bit line voltage error compensation.