发明申请
US20100237471A1 Semiconductor Die and Method of Forming Through Organic Vias Having Varying Width in Peripheral Region of the Die
有权
半导体芯片和通过在模具的周边区域具有不同宽度的有机通孔形成的方法
- 专利标题： Semiconductor Die and Method of Forming Through Organic Vias Having Varying Width in Peripheral Region of the Die
- 专利标题（中）： 半导体芯片和通过在模具的周边区域具有不同宽度的有机通孔形成的方法
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申请号： US12406038申请日： 2009-03-17
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公开(公告)号： US20100237471A1公开(公告)日： 2010-09-23
- 发明人: Reza A. Pagaila , Byung Tai Do , Shuangwu Huang
- 申请人： Reza A. Pagaila , Byung Tai Do , Shuangwu Huang
- 申请人地址： SG Singapore
- 专利权人： STATS ChipPAC, LTD.
- 当前专利权人： STATS ChipPAC, LTD.
- 当前专利权人地址： SG Singapore
- 主分类号： H01L23/538
- IPC分类号： H01L23/538 ; H01L21/50 ; H01L21/3205
摘要：
A plurality of semiconductor die is mounted to a carrier separated by a peripheral region. An insulating material is deposited in the peripheral region. A first opening is formed in the insulating material of the peripheral region to a first depth. A second opening is formed in the insulating material of the peripheral region centered over the first opening to a second depth less than the first depth. The first and second openings constitute a composite through organic via (TOV) having a first width in a vertical region of the first opening and a second width in a vertical region of the second opening. The second width is different than the first width. A conductive material is deposited in the composite TOV to form a conductive TOV. An organic solderability preservative (OSP) coating is formed over a contact surface of the conductive TOV.
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