A method and apparatus for testing an array of non-volatile memory cells, such as a spin-torque transfer random access memory (STRAM). In some embodiments, an array of memory cells having a plurality of unit cells with a resistive sense element and a switching device has a row decoder and a column decoder connected to the plurality of unit cells. A test circuitry sends a non-operational test pattern through the array via the row and column decoders with a quiescent supply current to identify defects in the array of memory cells.