Quiescent Testing of Non-Volatile Memory Array
    1.
    发明申请
    Quiescent Testing of Non-Volatile Memory Array 失效
    非易失性存储器阵列的静态测试

    公开(公告)号:US20100238700A1

    公开(公告)日:2010-09-23

    申请号:US12405932

    申请日:2009-03-17

    IPC分类号: G11C11/00 G11C29/00

    摘要: A method and apparatus for testing an array of non-volatile memory cells, such as a spin-torque transfer random access memory (STRAM). In some embodiments, an array of memory cells having a plurality of unit cells with a resistive sense element and a switching device has a row decoder and a column decoder connected to the plurality of unit cells. A test circuitry sends a non-operational test pattern through the array via the row and column decoders with a quiescent supply current to identify defects in the array of memory cells.

    摘要翻译: 用于测试非易失性存储器单元阵列的方法和装置,例如自旋转矩传递随机存取存储器(STRAM)。 在一些实施例中,具有多个具有电阻感测元件和开关器件的单位单元的存储器单元阵列具有连接到多个单位单元的行解码器和列解码器。 测试电路通过具有静态电源电流的行和列解码器通过阵列发送非操作测试模式,以识别存储器单元阵列中的缺陷。

    Quiescent testing of non-volatile memory array
    2.
    发明授权
    Quiescent testing of non-volatile memory array 失效
    非易失性存储器阵列的静态测试

    公开(公告)号:US08526252B2

    公开(公告)日:2013-09-03

    申请号:US12405932

    申请日:2009-03-17

    IPC分类号: G11C29/00

    摘要: A method and apparatus for testing an array of non-volatile memory cells, such as a spin-torque transfer random access memory (STRAM). In some embodiments, an array of memory cells having a plurality of unit cells with a resistive sense element and a switching device has a row decoder and a column decoder connected to the plurality of unit cells. A test circuitry sends a non-operational test pattern through the array via the row and column decoders with a quiescent supply current to identify defects in the array of memory cells.

    摘要翻译: 用于测试非易失性存储器单元阵列的方法和装置,例如自旋转矩传递随机存取存储器(STRAM)。 在一些实施例中,具有多个具有电阻感测元件和开关器件的单位单元的存储器单元阵列具有连接到多个单位单元的行解码器和列解码器。 测试电路通过具有静态电源电流的行和列解码器通过阵列发送非操作测试模式,以识别存储器单元阵列中的缺陷。