发明申请
US20100245142A1 TRI-LEVEL DYNAMIC ELEMENT MATCHER ALLOWING REDUCED REFERENCE LOADING AND DAC ELEMENT REDUCTION
有权
三电平动态元件匹配减少了参考负载和DAC元件减少
- 专利标题: TRI-LEVEL DYNAMIC ELEMENT MATCHER ALLOWING REDUCED REFERENCE LOADING AND DAC ELEMENT REDUCTION
- 专利标题(中): 三电平动态元件匹配减少了参考负载和DAC元件减少
-
申请号: US12384187申请日: 2009-04-01
-
公开(公告)号: US20100245142A1公开(公告)日: 2010-09-30
- 发明人: Andrew Myles , Andrew Terry
- 申请人: Andrew Myles , Andrew Terry
- 专利权人: Dialog Semiconductor GmbH
- 当前专利权人: Dialog Semiconductor GmbH
- 优先权: EP09368009.8 20090330
- 主分类号: H03M1/00
- IPC分类号: H03M1/00 ; H03M1/66
摘要:
Systems and methods using the same to achieve a tri-level multi-bit delta-sigma DAC having reduced power consumption and voltage droop have been achieved. A new rotation-based first order noise-shaping Dynamic Element Matcher (DEM) technique for use with 3-level unit elements have been disclosed. Reduced reference loading has been achieved when the tri-level DEM scheme is applied to switched capacitor implementations in particular. Furthermore a differential switched-capacitor DAC implementation, which enables use of the DEM technique is disclosed. The invention allows reduced circuit complexity required to implement a N-bit DAC when constructed using 3-level unit elements.
公开/授权文献
信息查询