发明申请
US20100245142A1 TRI-LEVEL DYNAMIC ELEMENT MATCHER ALLOWING REDUCED REFERENCE LOADING AND DAC ELEMENT REDUCTION 有权
三电平动态元件匹配减少了参考负载和DAC元件减少

TRI-LEVEL DYNAMIC ELEMENT MATCHER ALLOWING REDUCED REFERENCE LOADING AND DAC ELEMENT REDUCTION
摘要:
Systems and methods using the same to achieve a tri-level multi-bit delta-sigma DAC having reduced power consumption and voltage droop have been achieved. A new rotation-based first order noise-shaping Dynamic Element Matcher (DEM) technique for use with 3-level unit elements have been disclosed. Reduced reference loading has been achieved when the tri-level DEM scheme is applied to switched capacitor implementations in particular. Furthermore a differential switched-capacitor DAC implementation, which enables use of the DEM technique is disclosed. The invention allows reduced circuit complexity required to implement a N-bit DAC when constructed using 3-level unit elements.
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