发明申请
US20100245809A1 DEEP SUBMICRON AND NANO CMOS SINGLE PHOTON PHOTODETECTOR PIXEL WITH EVENT BASED CIRCUITS FOR READOUT DATA-RATE REDUCTION COMMUNICATION SYSTEM
有权
DEEP SUBMICRON和NANO CMOS单根光电子像素与基于事件的电路,用于读取数据速率减少通信系统
- 专利标题: DEEP SUBMICRON AND NANO CMOS SINGLE PHOTON PHOTODETECTOR PIXEL WITH EVENT BASED CIRCUITS FOR READOUT DATA-RATE REDUCTION COMMUNICATION SYSTEM
- 专利标题(中): DEEP SUBMICRON和NANO CMOS单根光电子像素与基于事件的电路,用于读取数据速率减少通信系统
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申请号: US12531191申请日: 2008-03-17
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公开(公告)号: US20100245809A1公开(公告)日: 2010-09-30
- 发明人: Andreas G. Andreou , Miriam Adlerstein Marwick , Philippe O. Pouliquen
- 申请人: Andreas G. Andreou , Miriam Adlerstein Marwick , Philippe O. Pouliquen
- 申请人地址: US MD Baltimore
- 专利权人: JOHNS HOPKINS UNIVERSITY
- 当前专利权人: JOHNS HOPKINS UNIVERSITY
- 当前专利权人地址: US MD Baltimore
- 国际申请: PCT/US08/57205 WO 20080317
- 主分类号: H01L27/144
- IPC分类号: H01L27/144 ; H01L31/107 ; G01J1/44
摘要:
An avalanche photodiode and a sensor array comprising an array of said avalanche photodiodes is disclosed. Then avalanche photodiode comprises a substrate of a first conductivity type; a first well of a second conductivity type formed within the substrate; a second well of the second conductivity type formed substantially overlying and extending into the first well; a heavily doped region of the first conductivity type formed substantially overlying and extending into the first well, the junction between the heavily doped region and the second well forming an avalanche multiplication region; a guard ring formed from a first conductivity material positioned substantially about the periphery of the multiplication region at least partially underlying the heavily doped region; and an outer well ring of the second conductivity type formed about the perimeter of the deep well and the guard ring. The sensor array comprises a plurality of pixel elements, each of the pixel elements being configured to operate on discrete value continuous time (DVCT) basis. Each of the pixel elements can include the avalanche photodiode previously described.
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