发明申请
US20100257336A1 Dependency Matrix with Reduced Area and Power Consumption 失效
具有减小面积和功耗的依赖矩阵

Dependency Matrix with Reduced Area and Power Consumption
摘要:
A processor having a dependency matrix comprises a first array comprising a plurality of first cells. A second array couples to the first array and comprises a plurality of second cells. A first write port couples to the first array and the second array and writes to the first array and the second array. A first read port couples to the first array and the second array and reads from the first array and the second array. A second read port couples to the first array and reads from the first array. A second write port couples to the second read port, reads from the second read port and writes to the second array.
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