Dependency matrix with reduced area and power consumption
    1.
    发明授权
    Dependency matrix with reduced area and power consumption 失效
    具有减少面积和功耗的依赖矩阵

    公开(公告)号:US08127116B2

    公开(公告)日:2012-02-28

    申请号:US12417768

    申请日:2009-04-03

    IPC分类号: G06F9/30

    CPC分类号: G06F9/3838

    摘要: A processor having a dependency matrix comprises a first array comprising a plurality of first cells. A second array couples to the first array and comprises a plurality of second cells. A first write port couples to the first array and the second array and writes to the first array and the second array. A first read port couples to the first array and the second array and reads from the first array and the second array. A second read port couples to the first array and reads from the first array. A second write port couples to the second read port, reads from the second read port and writes to the second array.

    摘要翻译: 具有依赖矩阵的处理器包括包括多个第一单元的第一阵列。 第二阵列耦合到第一阵列并且包括多个第二单元。 第一个写入端口耦合到第一个阵列和第二个阵列,并写入第一个阵列和第二个阵列。 第一读端口耦合到第一阵列和第二阵列,并从第一阵列和第二阵列读取。 第二个读取端口耦合到第一个数组并从第一个数组读取。 第二个写入端口耦合到第二个读取端口,从第二个读取端口读取并写入第二个数据。

    Dependency Matrix with Reduced Area and Power Consumption
    2.
    发明申请
    Dependency Matrix with Reduced Area and Power Consumption 失效
    具有减小面积和功耗的依赖矩阵

    公开(公告)号:US20100257336A1

    公开(公告)日:2010-10-07

    申请号:US12417768

    申请日:2009-04-03

    IPC分类号: G06F9/44 G06F15/00 G06F9/30

    CPC分类号: G06F9/3838

    摘要: A processor having a dependency matrix comprises a first array comprising a plurality of first cells. A second array couples to the first array and comprises a plurality of second cells. A first write port couples to the first array and the second array and writes to the first array and the second array. A first read port couples to the first array and the second array and reads from the first array and the second array. A second read port couples to the first array and reads from the first array. A second write port couples to the second read port, reads from the second read port and writes to the second array.

    摘要翻译: 具有依赖矩阵的处理器包括包括多个第一单元的第一阵列。 第二阵列耦合到第一阵列并且包括多个第二单元。 第一个写入端口耦合到第一个阵列和第二个阵列,并写入第一个阵列和第二个阵列。 第一读端口耦合到第一阵列和第二阵列,并从第一阵列和第二阵列读取。 第二个读取端口耦合到第一个数组并从第一个数组读取。 第二个写入端口耦合到第二个读取端口,从第二个读取端口读取并写入第二个数据。