发明申请
- 专利标题: ARRAY SUBSTRATE AND METHOD OF MANUFACTURING THE SAME
- 专利标题(中): 阵列基板及其制造方法
-
申请号: US12797527申请日: 2010-06-09
-
公开(公告)号: US20100261322A1公开(公告)日: 2010-10-14
- 发明人: Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
- 申请人: Jang-Soo Kim , Hong-Long Ning , Bong-Kyun Kim , Hong-Sick Park , Shi-Yul Kim , Chang-Oh Jeong , Sang-Gab Kim , Jae-Hyoung Youn , Woo-Geun Lee , Yang-Ho Bae , Pil-Sang Yun , Jong-Hyun Choung , Sun-Young Hong , Ki-Won Kim , Byeong-Jin Lee , Young-Wook Lee , Jong-In Kim , Byeong-Beom Kim , Nam-Seok Suh
- 专利权人: Samsung Electronics, Co. Ltd.
- 当前专利权人: Samsung Electronics, Co. Ltd.
- 优先权: KR10-2007-0115806 20071114
- 主分类号: H01L21/8234
- IPC分类号: H01L21/8234 ; H01L21/336
摘要:
A gate line includes a first seed layer formed on a base substrate and a first metal layer formed on the first seed layer. A first insulation layer is formed on the base substrate. A second insulation layer is formed on the base substrate. Here, a line trench is formed through the second insulation layer in a direction crossing the gate line. A data line includes a second seed layer formed below the line trench and a second metal layer formed in the line trench. A pixel electrode is formed in a pixel area of the base substrate. Therefore, a trench of a predetermined depth is formed using an insulation layer and a metal layer is formed through a plating method, so that a metal line having a sufficient thickness may be formed.
公开/授权文献
信息查询
IPC分类: