Thin film transistor array panel and method for manufacturing the same
    2.
    发明授权
    Thin film transistor array panel and method for manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号:US08507303B2

    公开(公告)日:2013-08-13

    申请号:US12699764

    申请日:2010-02-03

    申请人: Hong-Sick Park

    发明人: Hong-Sick Park

    IPC分类号: H01L21/336

    摘要: The present invention provides a thin film transistor array panel including an insulating substrate, a gate line formed on the insulating substrate, a gate insulating layer formed on the gate line, a drain electrode and a data line having a source electrode formed on the gate insulating layer wherein the drain electrode faces the source electrode with a gap therebetween, and a pixel electrode connected to the drain electrode. At least one of the gate line, the data line, and the drain electrode includes a first conductive layer made of a conductive oxide and a second conductive layer of Ag that is deposited adjacent to the first conductive layer.

    摘要翻译: 本发明提供一种薄膜晶体管阵列面板,其包括绝缘基板,形成在绝缘基板上的栅极线,形成在栅极线上的栅极绝缘层,漏极电极和数据线,该栅极绝缘层上形成有栅极绝缘 层,其中漏电极面对源电极,其间具有间隙,以及连接到漏电极的像素电极。 栅极线,数据线和漏电极中的至少一个包括由导电氧化物制成的第一导电层和与第一导电层相邻沉积的Ag的第二导电层。

    LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME
    4.
    发明申请
    LIQUID CRYSTAL DISPLAY AND METHOD FOR MANUFACTURING THE SAME 有权
    液晶显示器及其制造方法

    公开(公告)号:US20120133873A1

    公开(公告)日:2012-05-31

    申请号:US13193488

    申请日:2011-07-28

    IPC分类号: G02F1/1333 H01L33/16

    摘要: A method of manufacturing a liquid crystal display includes: forming a gate line including a gate electrode on a first substrate; forming a gate insulating layer on the gate line; sequentially forming a semiconductor layer, an amorphous silicon layer, and a data metal layer on the entire surface of the gate insulating layer; aligning the edges of the semiconductor layer and the data metal layer; forming a transparent conductive layer on the gate insulating layer and the data metal layer; forming a first pixel electrode and a second pixel electrode by patterning the transparent conductive layer; and forming a data line including a source electrode, a drain electrode, and an ohmic contact layer by etching the data metal layer and the amorphous silicon layer, using the first pixel electrode and the second pixel electrode as a mask, and exposing the semiconductor between the source electrode and the drain electrode.

    摘要翻译: 制造液晶显示器的方法包括:在第一基板上形成包括栅电极的栅极线; 在栅极线上形成栅极绝缘层; 在栅极绝缘层的整个表面上依次形成半导体层,非晶硅层和数据金属层; 对准半导体层和数据金属层的边缘; 在栅绝缘层和数据金属层上形成透明导电层; 通过图案化透明导电层形成第一像素电极和第二像素电极; 以及使用所述第一像素电极和所述第二像素电极作为掩模,通过蚀刻所述数据金属层和所述非晶硅层来形成包括源电极,漏电极和欧姆接触层的数据线,并且使所述半导体在 源电极和漏电极。

    Thin film transistor substrate and method of manufacturing thereof
    6.
    发明授权
    Thin film transistor substrate and method of manufacturing thereof 失效
    薄膜晶体管基板及其制造方法

    公开(公告)号:US08158470B2

    公开(公告)日:2012-04-17

    申请号:US13018309

    申请日:2011-01-31

    IPC分类号: H01L21/336

    摘要: A thin film transistor substrate and a method of manufacturing the thin film transistor substrate comprises forming a gate line and a data line intersecting each other with a gate insulating layer interposed and defining a pixel area on the substrate, a thin film transistor electrically connected to the gate line and the data line, and a stepped-structure occurring pattern overlapping at least one of the gate line and the data line; forming a passivation layer having a stepped-structure portion formed by the stepped-structure occurring pattern on the substrate; forming a photoresist pattern having a second stepped-structure portion corresponding to the stepped-structure portion on the passivation layer; patterning the passivation layer using the photoresist pattern as a mask; forming a transparent conductive layer on the substrate; and removing the photoresist pattern where the transparent conductive layer is covered by a stripper penetrating through the stepped-structure portion of the photoresist pattern and forming a pixel electrode connected to the thin film transistor.

    摘要翻译: 薄膜晶体管基板和制造薄膜晶体管基板的方法包括:形成栅极线和数据线,其中栅极绝缘层相互插入并限定基板上的像素区域,薄膜晶体管电连接到 栅极线和数据线,以及与栅极线和数据线中的至少一个重叠的阶梯结构发生图案; 在所述基板上形成具有由阶梯状结构发生图案形成的台阶状部分的钝化层; 形成具有对应于所述钝化层上的阶梯状结构部分的第二阶梯结构部分的光致抗蚀剂图案; 使用光致抗蚀剂图案作为掩模来图案化钝化层; 在所述基板上形成透明导电层; 以及去除透明导电层被穿透光致抗蚀剂图案的台阶结构部分的剥离剂覆盖的光致抗蚀剂图案,并形成连接到薄膜晶体管的像素电极。