发明申请
- 专利标题： TECHNIQUES FOR WRITE-AFTER-WRITE ORDERING IN A COHERENCY MANAGED PROCESSOR SYSTEM THAT EMPLOYS A COMMAND PIPELINE
- 专利标题（中）： 在使用命令管道的协调管理处理器系统中进行写后写入的技术
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申请号： US12420889申请日： 2009-04-09
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公开(公告)号： US20100262720A1公开(公告)日： 2010-10-14
- 发明人: George William Daly, JR. , Guy Lynn Guthrie , Ross Boyd Leavens , Joseph Gerald McDonald , Michael Steven Siegel , William John Starke , Derek Edward Williams
- 申请人： George William Daly, JR. , Guy Lynn Guthrie , Ross Boyd Leavens , Joseph Gerald McDonald , Michael Steven Siegel , William John Starke , Derek Edward Williams
- 申请人地址： US NY ARMONK
- 专利权人： INTERNATIONAL BUISNESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUISNESS MACHINES CORPORATION
- 当前专利权人地址： US NY ARMONK
- 主分类号： G06F3/00
- IPC分类号： G06F3/00
摘要：
A technique for maintaining input/output (I/O) command ordering on a bus includes assigning a channel identifier to I/O commands of an I/O stream. In this case, the channel identifier indicates the I/O commands belong to the I/O stream. A command location indicator is assigned to each of the I/O commands. The command location indicator provides an indication of which one of the I/O commands is a start command in the I/O stream and which of the I/O commands are continue commands in the I/O stream. The I/O commands are issued in a desired completion order. When a first one of the I/O commands does not complete successfully, the I/O commands in the I/O stream are reissued on the bus starting at the first one of the I/O commands that did not complete successfully.
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