发明申请
- 专利标题: Array substrate for dislay device and method of fabricating the same
- 专利标题(中): 阵列衬底及其制造方法
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申请号: US12654584申请日: 2009-12-23
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公开(公告)号: US20100289023A1公开(公告)日: 2010-11-18
- 发明人: Hee-Dong Choi , Ki-Sul Cho , Hye-Young Choi , Doo-Seok Yang , Byeong-Gyu Roh
- 申请人: Hee-Dong Choi , Ki-Sul Cho , Hye-Young Choi , Doo-Seok Yang , Byeong-Gyu Roh
- 优先权: KR10-2009-0042813 20090515; KR10-2009-0108552 20091111
- 主分类号: H01L33/00
- IPC分类号: H01L33/00 ; H01L21/336
摘要:
A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first passivation layer; forming a second passivation layer on a surface of the first passivation layer including the gate line formed thereon; and forming a pixel electrode on the second passivation layer.
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