公开(公告)号：US08329523B2

公开(公告)日：2012-12-11

申请号：US12654584

申请日：2009-12-23

申请人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

发明人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

IPC分类号： H01L21/00 ,  H01L21/84

CPC分类号： H01L27/1288 ,  G02F2001/136236 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/3244 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/66765 ,  H01L2227/323

摘要： A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first passivation layer; forming a second passivation layer on a surface of the first passivation layer including the gate line formed thereon; and forming a pixel electrode on the second passivation layer.

摘要翻译： 一种制造用于显示装置的阵列基板的方法包括：在具有像素区域的基板上形成缓冲层; 在像素区域的缓冲层上依次形成杂质掺杂多晶硅的栅电极，栅极绝缘层和本征多晶硅的有源层; 在有源层上形成无机绝缘材料的层间绝缘层; 在层间绝缘层上顺序地形成源极阻挡图案，源极欧姆接触层和源电极，在层间绝缘层上依次形成漏极阻挡图案，漏极欧姆接触层和漏极，并依次形成第一虚拟 图案，第二虚设图案和数据线; 在包括形成在其上的源电极，漏电极和数据线的层间绝缘层的表面上形成第一钝化层; 在所述第一钝化层上形成栅极线; 在包括形成在其上的栅极线的第一钝化层的表面上形成第二钝化层; 以及在所述第二钝化层上形成像素电极。

公开(公告)号：US20100289023A1

公开(公告)日：2010-11-18

申请号：US12654584

申请日：2009-12-23

申请人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

发明人： Hee-Dong Choi ,  Ki-Sul Cho ,  Hye-Young Choi ,  Doo-Seok Yang ,  Byeong-Gyu Roh

IPC分类号： H01L33/00 ,  H01L21/336

CPC分类号： H01L27/1288 ,  G02F2001/136236 ,  H01L21/02532 ,  H01L21/02667 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/3244 ,  H01L29/42384 ,  H01L29/458 ,  H01L29/66765 ,  H01L2227/323

摘要： A method of fabricating an array substrate for a display device includes: forming a buffer layer on a substrate having a pixel region; sequentially forming a gate electrode of impurity-doped polycrystalline silicon, a gate insulating layer and an active layer of intrinsic polycrystalline silicon on the buffer layer in the pixel region; forming an interlayer insulating layer of an inorganic insulating material on the active layer; sequentially forming a source barrier pattern, a source ohmic contact layer and a source electrode on the interlayer insulating layer, sequentially forming a drain barrier pattern, a drain ohmic contact layer and a drain electrode on the interlayer insulating layer, and sequentially forming a first dummy pattern, a second dummy pattern and a data line on the interlayer insulating layer; forming a first passivation layer on a surface of the interlayer insulating layer including the source electrode, the drain electrode and the data line formed thereon; forming a gate line on the first passivation layer; forming a second passivation layer on a surface of the first passivation layer including the gate line formed thereon; and forming a pixel electrode on the second passivation layer.

摘要翻译： 一种制造用于显示装置的阵列基板的方法包括：在具有像素区域的基板上形成缓冲层; 在像素区域的缓冲层上依次形成杂质掺杂多晶硅的栅电极，栅极绝缘层和本征多晶硅的有源层; 在有源层上形成无机绝缘材料的层间绝缘层; 在层间绝缘层上顺序地形成源极阻挡图案，源极欧姆接触层和源电极，在层间绝缘层上依次形成漏极阻挡图案，漏极欧姆接触层和漏极，并依次形成第一虚拟 图案，第二虚设图案和数据线; 在包括形成在其上的源极电极，漏极电极和数据线的层间绝缘层的表面上形成第一钝化层; 在所述第一钝化层上形成栅极线; 在包括形成在其上的栅极线的第一钝化层的表面上形成第二钝化层; 以及在所述第二钝化层上形成像素电极。

公开(公告)号：US20120104405A1

公开(公告)日：2012-05-03

申请号：US13285584

申请日：2011-10-31

申请人： Hee-Dong CHOI ,  Ki-Sul Cho ,  Seong-Moh Seo

发明人： Hee-Dong CHOI ,  Ki-Sul Cho ,  Seong-Moh Seo

IPC分类号： H01L33/08 ,  H01L33/16

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3246 ,  H01L27/3265 ,  H01L2227/323

摘要： A method of fabricating an array substrate for an organic electroluminescent device includes forming a semiconductor layer of polysilicon in an element region, and a semiconductor pattern of polysilicon in a storage region on a substrate; forming a multiple-layered gate electrode corresponding to a center portion of the semiconductor layer and a first storage electrode corresponding to the semiconductor pattern; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and make the semiconductor pattern into a second storage electrode; forming source and drain electrodes and a third storage electrode corresponding to the first storage electrode; forming a first electrode contacting the drain electrode and a fourth storage electrode corresponding to the third storage electrode.

摘要翻译： 一种制造有机电致发光器件用阵列基板的方法包括：在元件区域中形成多晶硅的半导体层，以及在基板上的存储区域中形成多晶硅的半导体图案; 形成对应于所述半导体层的中心部分的多层栅电极和对应于所述半导体图案的第一存储电极; 进行杂质掺杂，使未被栅电极覆盖的半导体层的一部分成为欧姆接触层，并使半导体图案成为第二存储电极; 形成源极和漏极;以及对应于第一存储电极的第三存储电极; 形成与所述漏电极接触的第一电极和对应于所述第三存储电极的第四存储电极。

公开(公告)号：US08614462B2

公开(公告)日：2013-12-24

申请号：US13285584

申请日：2011-10-31

申请人： Hee-Dong Choi ,  Ki-Sul Cho ,  Seong-Moh Seo

发明人： Hee-Dong Choi ,  Ki-Sul Cho ,  Seong-Moh Seo

IPC分类号： H01L27/118

CPC分类号： H01L29/4908 ,  H01L27/124 ,  H01L27/1255 ,  H01L27/3246 ,  H01L27/3265 ,  H01L2227/323

摘要： A method of fabricating an array substrate for an organic electroluminescent device includes forming a semiconductor layer of polysilicon in an element region, and a semiconductor pattern of polysilicon in a storage region on a substrate; forming a multiple-layered gate electrode corresponding to a center portion of the semiconductor layer and a first storage electrode corresponding to the semiconductor pattern; performing an impurity-doping to make a portion of the semiconductor layer not covered by the gate electrode into an ohmic contact layer and make the semiconductor pattern into a second storage electrode; forming source and drain electrodes and a third storage electrode corresponding to the first storage electrode; forming a first electrode contacting the drain electrode and a fourth storage electrode corresponding to the third storage electrode.

摘要翻译： 一种制造有机电致发光器件用阵列基板的方法包括：在元件区域中形成多晶硅的半导体层，以及在基板上的存储区域中形成多晶硅的半导体图案; 形成对应于所述半导体层的中心部分的多层栅电极和对应于所述半导体图案的第一存储电极; 进行杂质掺杂，使未被栅电极覆盖的半导体层的一部分成为欧姆接触层，并使半导体图案成为第二存储电极; 形成源极和漏极;以及对应于第一存储电极的第三存储电极; 形成与所述漏电极接触的第一电极和对应于所述第三存储电极的第四存储电极。

公开(公告)号：US08178883B2

公开(公告)日：2012-05-15

申请号：US12314337

申请日：2008-12-08

申请人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

发明人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

IPC分类号： H01L27/14

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214

摘要： A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.

摘要翻译： 制造液晶显示装置用阵列基板的方法包括：通过第一掩模工艺在基板上形成栅极线，栅极焊盘，栅电极和数据焊盘，在绝缘层的大部分上形成栅极绝缘层 包括栅极线，栅极焊盘，栅极电极和数据焊盘的基板的整个表面，在栅极绝缘层上形成数据线，源极 - 漏极图案和有源层，并形成栅极焊盘接触孔 以及通过第二掩模处理在栅极绝缘层中的数据焊盘接触孔，并且通过第三掩模形成像素电极，栅极焊盘端子，数据焊盘端子，源极，漏电极和欧姆接触层 处理。

公开(公告)号：US07479419B2

公开(公告)日：2009-01-20

申请号：US11304586

申请日：2005-12-16

申请人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

发明人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

IPC分类号： H01L21/84

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214

摘要： A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.

摘要翻译： 制造液晶显示装置用阵列基板的方法包括：通过第一掩模工艺在基板上形成栅极线，栅极焊盘，栅电极和数据焊盘，在绝缘层的大部分上形成栅极绝缘层 包括栅极线，栅极焊盘，栅极电极和数据焊盘的基板的整个表面，在栅极绝缘层上形成数据线，源极 - 漏极图案和有源层，并形成栅极焊盘接触孔 以及通过第二掩模处理在栅极绝缘层中的数据焊盘接触孔，并且通过第三掩模形成像素电极，栅极焊盘端子，数据焊盘端子，源极，漏电极和欧姆接触层 处理。

公开(公告)号：US07253850B2

公开(公告)日：2007-08-07

申请号：US10730977

申请日：2003-12-10

申请人： Ki-Sul Cho

发明人： Ki-Sul Cho

IPC分类号： G02F1/1333

CPC分类号： G02F1/136259 ,  G02F1/136213 ,  G02F2001/136268

摘要： A liquid crystal display device adopting a storage-on-common method is disclosed to prevent the operation of a unit pixel with a point deficiency, such as a brilliant spot, at its occurrence, thereby preventing degradation of a picture quality caused due to the defective pixel. Because the defective pixel is controlled to turn black by the use of a repair pattern, the picture quality degradation due to the defective pixel is prevented when the liquid crystal display device is driven.

摘要翻译： 公开了一种采用普通存储方法的液晶显示装置，以防止出现点亮等点缺陷的单位像素的操作，从而防止由于缺陷导致的图像质量的劣化 像素。 由于通过使用修复图案将缺陷像素控制为变黑，所以当驱动液晶显示装置时，防止由于缺陷像素导致的图像质量劣化。

公开(公告)号：US08400604B2

公开(公告)日：2013-03-19

申请号：US12850357

申请日：2010-08-04

申请人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

发明人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363

摘要： Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.

摘要翻译： 本发明提供一种用于IPS模式LCD装置的阵列基板及其制造方法，其防止称作波浪噪声的问题。 IPS模式LCD装置和方法具有较短的处理时间和低错误率，而不增加制造和生产成本。

公开(公告)号：US20100315584A1

公开(公告)日：2010-12-16

申请号：US12850357

申请日：2010-08-04

申请人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

发明人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

IPC分类号： G02F1/1343

CPC分类号： G02F1/134363

摘要： Provided is an array substrate for an IPS-mode LCD device and method of fabricating the same that prevents a problem referred to as wavy noise. The IPS-mode LCD device and method have a shorter processing time and low error rate without an increase in fabrication and production costs.

摘要翻译： 本发明提供一种用于IPS模式LCD装置的阵列基板及其制造方法，其防止称作波浪噪声的问题。 IPS模式LCD装置和方法具有较短的处理时间和低错误率，而不增加制造和生产成本。

公开(公告)号：US20060262244A1

公开(公告)日：2006-11-23

申请号：US11304586

申请日：2005-12-16

申请人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

发明人： Ki-Sul Cho ,  Young-Seok Choi ,  Byung-Yong Ahn ,  Tae-Ung Hwang ,  Dong-Jun Min ,  Bo-Kyoung Jung

IPC分类号： G02F1/1343 ,  H01L21/84

CPC分类号： H01L27/1288 ,  G02F1/1362 ,  G02F2001/136231 ,  G02F2001/136236 ,  H01L27/1214

摘要： A method of manufacturing an array substrate for a liquid crystal display device includes forming a gate line, a gate pad, a gate electrode, and a data pad on a substrate through a first mask process, forming a gate insulating layer on a substantial part of an entire surface of the substrate including the gate line, the gate pad, the gate electrode, and the data pad, forming a data line, a source-drain pattern and an active layer on the gate insulating layer and forming a gate pad contact hole and a data pad contact hole in the gate insulating layer through a second mask process, and forming a pixel electrode, a gate pad terminal, a data pad terminal, a source electrode, a drain electrode, and an ohmic contact layer through a third mask process.