发明申请
- 专利标题： WIRING BOARD, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING WIRING BOARD AND SEMICONDUCTOR DEVICE
- 专利标题（中）： 接线板，半导体器件及制造接线板及半导体器件的方法
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申请号： US12811733申请日： 2009-01-06
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公开(公告)号： US20100295191A1公开(公告)日： 2010-11-25
- 发明人: Katsumi Kikuchi , Shintaro Yamamichi , Masaya Kawano , Kouji Soejima , Yoichiro Kurita
- 申请人： Katsumi Kikuchi , Shintaro Yamamichi , Masaya Kawano , Kouji Soejima , Yoichiro Kurita
- 优先权： JP2008-002341 20080109
- 国际申请： PCT/JP2009/050046 WO 20090106
- 主分类号： H01L23/49
- IPC分类号： H01L23/49 ; H01L21/60 ; H05K1/11 ; H01R43/00
摘要：
In the wiring board, insulating layers and wiring layers are alternately laminated, and the wiring layers are electrically connected by the vias. The wiring board includes first terminals arranged in a first surface and embedded in an insulating layer, second terminals arranged in a second surface opposite to the first surface and embedded in an insulating layer, and lands arranged in an insulating layer and in contact with the first terminals. The vias electrically connect the lands and the wiring layers laminated alternately with the insulating layers. No connecting interface is formed at an end of each of the vias on the land side but a connecting interface is formed at an end of each of the vias on the wiring layer side.
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