发明申请
US20100306725A1 APPARATUS AND METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND COMPUTER READABLE MEDIUM 审中-公开
设计半导体集成电路的设备和方法以及计算机可读介质

  • 专利标题: APPARATUS AND METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND COMPUTER READABLE MEDIUM
  • 专利标题(中): 设计半导体集成电路的设备和方法以及计算机可读介质
  • 申请号: US12724251
    申请日: 2010-03-15
  • 公开(公告)号: US20100306725A1
    公开(公告)日: 2010-12-02
  • 发明人: Yukio KAWASAKI
  • 申请人: Yukio KAWASAKI
  • 申请人地址: JP Tokyo
  • 专利权人: KABUSHIKI KAISHA TOSHIBA
  • 当前专利权人: KABUSHIKI KAISHA TOSHIBA
  • 当前专利权人地址: JP Tokyo
  • 优先权: JP2009-127468 20090527
  • 主分类号: G06F17/50
  • IPC分类号: G06F17/50
APPARATUS AND METHOD FOR DESIGNING SEMICONDUCTOR INTEGRATED CIRCUIT, AND COMPUTER READABLE MEDIUM
摘要:
An apparatus for designing a semiconductor integrated circuit according to an embodiment of the present invention includes an interface circuit information extracting unit configured to specify one or more transmitting registers and one or more receiving registers forming an interface that needs to be synchronized, an insertion point candidate specifying unit configured to specify a number of supply sources that is of a number of the transmitting registers serving as data supply sources, for each receiving register, and specify at least one insertion point candidate based on the number of supply sources, an insertion point specifying unit configured to specify a number of output destinations that is of a number of the receiving registers serving as data output destinations, for each transmitting register, and specify at least one insertion point based on the number of output destinations and the insertion point candidate, and a synchronization circuit inserting unit configured to insert a synchronization circuit in the insertion point, and generate synchronized circuit description data of the semiconductor integrated circuit in which the synchronization circuit is inserted in the insertion point.
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