发明申请
- 专利标题: SEMICONDUCTOR MEMORY DEVICE INCLUDING CHARGE ACCUMULATION LAYER
- 专利标题(中): 半导体存储器件,包括充电累积层
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申请号: US12817665申请日: 2010-06-17
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公开(公告)号: US20100322009A1公开(公告)日: 2010-12-23
- 发明人: Takeshi SHIMANE , Naoyuki Shigyo , Mutsuo Morikado
- 申请人: Takeshi SHIMANE , Naoyuki Shigyo , Mutsuo Morikado
- 优先权: JP2009-145471 20090618; JP2010-098188 20100421
- 主分类号: G11C16/04
- IPC分类号: G11C16/04 ; H01L29/792
摘要:
According to one embodiment, a semiconductor memory device includes a semiconductor substrate, memory cells without a source region and a drain region, and a first insulating film. The memory cells are arranged adjacent to one another on the semiconductor substrate and include a first gate electrode including a charge accumulation layer. A current path functioning as a source region or a drain region of a selected memory cell is formed in the semiconductor substrate when a voltage is applied to the first gate electrode of one of unselected memory cells. The first insulating film is formed on the semiconductor substrate to fill a region between the first gate electrodes of the memory cells adjacent to each other.
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