发明申请
- 专利标题: Priority circuit, processor, and processing method
- 专利标题(中): 优先级电路,处理器和处理方法
-
申请号: US12801868申请日: 2010-06-29
-
公开(公告)号: US20100332802A1公开(公告)日: 2010-12-30
- 发明人: Atsushi Fusejima , Yasunobu Akizuki , Toshio Yoshida
- 申请人: Atsushi Fusejima , Yasunobu Akizuki , Toshio Yoshida
- 申请人地址: JP Kawasaki
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki
- 优先权: JP2009-154374 20090629
- 主分类号: G06F9/30
- IPC分类号: G06F9/30
摘要:
A priority circuit is connected to a reservation station and a plurality of arithmetic units that processes different operations and dispatches, when it is determined that an executable flag indicating that an instruction can be executed by only a specific arithmetic unit is on, an instruction to an arithmetic unit that is different from the specific arithmetic unit and of which a queue is vacant in accordance with the input performed by an instruction decoder and the reservation station.
公开/授权文献
信息查询