发明申请
- 专利标题： Fabrication of self-aligned CMOS structure
- 专利标题（中）： 自对准CMOS结构的制作
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申请号： US12883874申请日： 2010-09-16
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公开(公告)号： US20110001195A1公开(公告)日： 2011-01-06
- 发明人: Dae-Gyu Park , Michael P. Chudzik , Vijay Narayanan , Vamsi Paruchuri
- 申请人： Dae-Gyu Park , Michael P. Chudzik , Vijay Narayanan , Vamsi Paruchuri
- 申请人地址： US NY Armonk
- 专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人： INTERNATIONAL BUSINESS MACHINES CORPORATION
- 当前专利权人地址： US NY Armonk
- 主分类号： H01L27/092
- IPC分类号： H01L27/092
摘要：
A method for fabricating a CMOS structure is disclosed. The method includes the blanket disposition of a high-k gate insulator layer in an NFET device and in a PFET device, and the implementation of a gate metal layer over the NFET device. This is followed by a blanket disposition of an Al layer over both the NFET device and the PFET device. The method further involves a blanket disposition of a shared gate metal layer over the Al layer. When the PFET device is exposed to a thermal annealing, the high-k dielectric oxidizes the Al layer, thereby turning the Al layer into a PFET interfacial control layer, while in the NFET device the Al becomes a region of the metal gate.
公开/授权文献
- US08030716B2 Self-aligned CMOS structure with dual workfunction 公开/授权日：2011-10-04
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