发明申请
- 专利标题: METHOD AND APPARATUS FOR MODULO N CALCULATION
- 专利标题(中): 用于模数计算的方法和装置
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申请号: US12517893申请日: 2007-06-19
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公开(公告)号: US20110016168A1公开(公告)日: 2011-01-20
- 发明人: Seong Chul Cho , Hyung Jin Kim , Gweon Do Jo , Jin Up Kim , Dae Sik Kim
- 申请人: Seong Chul Cho , Hyung Jin Kim , Gweon Do Jo , Jin Up Kim , Dae Sik Kim
- 申请人地址: KR Daejeon
- 专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人: Electronics and Telecommunications Research Institute
- 当前专利权人地址: KR Daejeon
- 优先权: KR10-2006-0124183 20061207; KR10-2007-0044653 20070508
- 国际申请: PCT/KR07/02971 WO 20070619
- 主分类号: G06F7/38
- IPC分类号: G06F7/38
摘要:
A modulo N calculating method for an M1*M2-bit binary integer, wherein N, M1 and M2 are integers, includes the steps of dividing the M1*M2-bit binary integer into M1 bits and performing AND operation on each M1 bits and a specific binary integer; and changing a value of an output register depending on the AND operation result and storing the value thereto. A modulo N calculating apparatus includes an input unit for receiving an M1*M2-bit binary integer, wherein N, M1 and M2 are integers; and an AND operation unit for performing AND operation on the M1*M2-bit binary integer and a specific binary integer. Furthermore, when the M1 and the N may be 4 and 3, respectively, the specific binary value may be 1010 or 0101.
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