发明申请
- 专利标题: Integrated Nanostructure-Based Non-Volatile Memory Fabrication
- 专利标题(中): 基于纳米结构的非易失性存储器制造
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申请号: US12840081申请日: 2010-07-20
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公开(公告)号: US20110020992A1公开(公告)日: 2011-01-27
- 发明人: Vinod Robert Purayath , James K. Kai , Masaaki Higashitani , Takashi Orimoto , George Matamis , Henry Chien
- 申请人: Vinod Robert Purayath , James K. Kai , Masaaki Higashitani , Takashi Orimoto , George Matamis , Henry Chien
- 主分类号: H01L21/336
- IPC分类号: H01L21/336 ; H01L21/76 ; H01L21/3205
摘要:
Nanostructure-based charge storage regions are included in non-volatile memory devices and integrated with the fabrication of select gates and peripheral circuitry. One or more nanostructure coatings are applied over a substrate at a memory array area and a peripheral circuitry area. Various processes for removing the nanostructure coating from undesired areas of the substrate, such as target areas for select gates and peripheral transistors, are provided. One or more nanostructure coatings are formed using self-assembly based processes to selectively form nanostructures over active areas of the substrate in one example. Self-assembly permits the formation of discrete lines of nanostructures that are electrically isolated from one another without requiring patterning or etching of the nanostructure coating.